6e8fbca745
match the genesis editor version 1.3.0.653.
155 lines
4.3 KiB
C++
155 lines
4.3 KiB
C++
// This code contains NVIDIA Confidential Information and is disclosed to you
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// under a form of NVIDIA software license agreement provided separately to you.
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//
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// Notice
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// NVIDIA Corporation and its licensors retain all intellectual property and
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// proprietary rights in and to this software and related documentation and
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// any modifications thereto. Any use, reproduction, disclosure, or
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// distribution of this software and related documentation without an express
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// license agreement from NVIDIA Corporation is strictly prohibited.
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//
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// ALL NVIDIA DESIGN SPECIFICATIONS, CODE ARE PROVIDED "AS IS.". NVIDIA MAKES
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// NO WARRANTIES, EXPRESSED, IMPLIED, STATUTORY, OR OTHERWISE WITH RESPECT TO
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// THE MATERIALS, AND EXPRESSLY DISCLAIMS ALL IMPLIED WARRANTIES OF NONINFRINGEMENT,
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// MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE.
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//
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// Information and code furnished is believed to be accurate and reliable.
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// However, NVIDIA Corporation assumes no responsibility for the consequences of use of such
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// information or for any infringement of patents or other rights of third parties that may
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// result from its use. No license is granted by implication or otherwise under any patent
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// or patent rights of NVIDIA Corporation. Details are subject to change without notice.
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// This code supersedes and replaces all information previously supplied.
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// NVIDIA Corporation products are not authorized for use as critical
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// components in life support devices or systems without express written approval of
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// NVIDIA Corporation.
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//
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// Copyright (c) 2008-2013 NVIDIA Corporation. All rights reserved.
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#ifndef PX_GPU_COPY_DESC_QUEUE_H
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#define PX_GPU_COPY_DESC_QUEUE_H
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/*!
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\file
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\brief Container for enqueing copy descriptors in pinned memory
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*/
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#include "foundation/PxAssert.h"
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#include "pxtask/PxGpuCopyDesc.h"
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#include "pxtask/PxGpuDispatcher.h"
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#include "pxtask/PxCudaContextManager.h"
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#ifndef PX_DOXYGEN
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namespace physx
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{
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#endif
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namespace pxtask
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{
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PX_PUSH_PACK_DEFAULT
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/// \brief Container class for queueing GpuCopyDesc instances in pinned (non-pageable) CPU memory
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class GpuCopyDescQueue
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{
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public:
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/// \brief GpuCopyDescQueue constructor
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GpuCopyDescQueue(GpuDispatcher& d)
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: mDispatcher(d)
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, mBuffer(0)
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, mStream(0)
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, mReserved(0)
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, mOccupancy(0)
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, mFlushed(0)
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{
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}
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/// \brief GpuCopyDescQueue destructor
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~GpuCopyDescQueue()
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{
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if (mBuffer)
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{
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mDispatcher.getCudaContextManager()->getMemoryManager()->free(CudaBufferMemorySpace::T_PINNED_HOST, (size_t) mBuffer);
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}
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}
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/// \brief Reset the enqueued copy descriptor list
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///
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/// Must be called at least once before any copies are enqueued, and each time the launched
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/// copies are known to have been completed. The recommended use case is to call this at the
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/// start of each simulation step.
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void reset(CUstream stream, PxU32 reserveSize)
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{
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if (reserveSize > mReserved)
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{
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if (mBuffer)
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{
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mDispatcher.getCudaContextManager()->getMemoryManager()->free(
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CudaBufferMemorySpace::T_PINNED_HOST,
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(size_t) mBuffer);
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mReserved = 0;
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}
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mBuffer = (GpuCopyDesc*) mDispatcher.getCudaContextManager()->getMemoryManager()->alloc(
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CudaBufferMemorySpace::T_PINNED_HOST,
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reserveSize * sizeof(GpuCopyDesc),
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NV_ALLOC_INFO("PxGpuCopyDescQueue", GPU_UTIL));
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if (mBuffer)
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{
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mReserved = reserveSize;
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}
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}
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mOccupancy = 0;
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mFlushed = 0;
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mStream = stream;
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}
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/// \brief Enqueue the specified copy descriptor, or launch immediately if no room is available
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void enqueue(GpuCopyDesc& desc)
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{
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PX_ASSERT(desc.isValid());
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if (desc.bytes == 0)
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{
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return;
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}
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if (mOccupancy < mReserved)
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{
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mBuffer[ mOccupancy++ ] = desc;
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}
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else
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{
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mDispatcher.launchCopyKernel(&desc, 1, mStream);
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}
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}
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/// \brief Launch all copies queued since the last flush or reset
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void flushEnqueued()
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{
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if (mOccupancy > mFlushed)
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{
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mDispatcher.launchCopyKernel(mBuffer + mFlushed, mOccupancy - mFlushed, mStream);
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mFlushed = mOccupancy;
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}
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}
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private:
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GpuDispatcher& mDispatcher;
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GpuCopyDesc* mBuffer;
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CUstream mStream;
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PxU32 mReserved;
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PxU32 mOccupancy;
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PxU32 mFlushed;
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void operator=(const GpuCopyDescQueue&); // prevent a warning...
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};
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PX_POP_PACK
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} // end pxtask namespace
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#ifndef PX_DOXYGEN
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} // end physx namespace
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#endif
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#endif
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